(Source: Microchip Technology)
RISC-V is a reduced ISA (instruction set architecture) designed for scalability and versatility in a wide range of applications and use cases. RISC-V is rapidly gaining acceptance as an open-sourced alternative to more well-established Instruction Set Architectures (ISAs) and delivers higher processing speeds and lower latency while reducing power consumption. The supporting framework around RISC-V is growing as well, and Microchip Technology is building an ecosystem to support its portfolio of RISC-V soft computer processing units (CPUs) and PolarFire® System-on-Chip (SoC) FPGAs. As a result, RISC-V-based designs have lower power, increased flexibility, fast time-to-market, and offer Linux support without the trade-offs required by other solutions.
An expanding ecosystem is vital in providing developers with a complete design solution, which is critical in reducing a product's time-to-market. The Microchip Mi-V ecosystem includes soft-core RISC-V CPUs (Figure 1) targeted for FPGA fabric and hard CPU cores implemented in the PolarFire SoC FPGAs. In addition, Mi-V provides an extensive suite of design tools and resources cultivated by Microchip and its partners to help developers adopt and refine RISC-V application designs. These tools can be used in conjunction with various hardware kits—the PolarFire Evaluation kit for PolarFire FPGAs and the Icicle kit for PolarFire SoC FPGAs—and associated IP and libraries for simplifying the implementation of high-speed interfaces, digital signal processing, memory, motor control, and even embedded vision to speed-solution development. Support for real-time Linux is a vital strength of the Microchip Technology RISC-V implementation with deterministic execution that can be critical for real-time applications. Mi-V also provides several third-party support for a wide range of development tools and resources.
Figure 1: FPGA with RISC-V IP Core (Source: Microchip Technology)
Microchip Technology’s portfolio of RISC-V soft CPUs target FPGA fabric with lower power consumption and a small footprint. When only a single CPU is required, an FPGA-based implementation can be advantageous. An FPGA implementation also provides additional flexibility and customization, including the option of adding specialized hardware acceleration in proximity with the CPU. When multiple CPUs are required, perhaps in high-reliability or high-performance applications, the PolarFire SoC FPGA provides five hardened RISC-V cores. This Linux-capable SoC features a coherent memory subsystem across cores and configurable branch prediction capabilities, allowing a flexible mix of deterministic real-time systems and Linux in a single multicore CPU cluster that executes on time, every time. The availability of both soft RISC-V cores and hardened cores in the Mi-V ecosystem makes the Microchip Technology portfolio one of the most flexible in the industry. The power efficiency of the hard-core CPU implementation and the inherent low-power characteristics of the PolarFire FPGA fabric ensure the Microchip Technology RISC-V solution is the leader in power-consumption reduction (Figure 2).
Figure 2: PolarFire SoC FPGA Block Diagram (Source: Microchip Technology)
Most FPGAs only implement a single soft processor, but utilizing multiple cores on a single FPGA allows the cluster to share resources and distribute the computing burden. Multicore processors have proven to perform complex functions and operations more efficiently than their predecessors, such as in-memory computing and massive parallelism. The PolarFire SoC family of FPGAs is based on Microchip's celebrated mid-range PolarFire FPGA architecture and provides high-end security while reducing power consumption by up to 50 percent for various applications. The SoC FPGA features a deterministic RISC-V CPU cluster and a deterministic L2 memory subsystem for Linux compatibility and other real-time applications and spans from 25k to 460k LEs (logic elements). According to the Embedded Microprocessor Benchmark Consortium's (EMBC) benchmark scoring system CoreMark—essentially a single-digit number that reflects the overall functionality of a processor core—PolarFire SoC FPGAs in the 25k LE range deliver 5.5 CoreMarks at 105W, while SRAM-based SoCs using the same amount of power delivered zero CoreMarks. PolarFire SoCs in the 100k and 460k LEs range have similar advantages over their competitors on the CoreMark scale. PolarFire SoCs are a secure and power-efficient solution for various applications ranging from artificial intelligence (AI) and machine learning to automotive and industrial implementations, including the IoT and Industrial Internet of Things (IIoT).
Efficient and easy-to-use design tools are critical in designing RISC-V-based systems while accelerating time-to-market. The Mi-V ecosystem includes the Librero SoC design suite for development with PolarFire FPGAs and SoC FPGAs, and other FPGAs. The Mi-V ecosystem consists of the Eclipse-based SoftConsole integrated development environment (IDE), complete with GCC compiler and debugger. Librero and SoftConsole provide everything a developer needs to port Microchip Technology's RISC-V soft CPUs onto FPGAs and test and debug embedded firmware.
A multitude of design support resources—including tutorials, design examples, datasheets, tools for power estimation, white papers, webinars, videos, operating systems from GreenHills, Mentor and WindRiver, Yocto and Buildroot Linux BSPs, Hart software services, a variety of middleware, and other resources—round out the MI-V ecosystem and expedite time-to-market.
RISC-V is the next frontier in embedded computing, and Microchip Technology is leading the way in developing a complete solution for application designers. “Delivering the industry’s first RISC-V based SoC FPGA along with our Mi-V ecosystem, Microchip and its Mi-V partners are driving innovation in the embedded space, giving designers the ability to develop a whole new class of power-efficient applications,” says Bruce Weyer, VP of the FPGA business unit at Microchip Technology. “This, in turn, will allow our clients to add unprecedented capabilities at the edge of the network for communications, defense, medical, and industrial automation.”
Alex is a senior technical writer for Wavefront Marketing specializing in advanced electronics, emerging technologies and responsible technology development.
Privacy Centre |
Terms and Conditions
Copyright ©2021 Mouser Electronics, Inc.
Mouser® and Mouser Electronics® are trademarks of Mouser Electronics, Inc. in the U.S. and/or other countries.
All other trademarks are the property of their respective owners.
Corporate headquarters and logistics centre in Mansfield, Texas USA.