
Analog Devices Inc. ADN4650 / ADN4651 / ADN4652 LVDS Isolators
Analog Devices ADN4650/ADN4651/ADN4652 Dual Channel Low Voltage Differential Signaling (LVDS) Isolators operate up to 600Mbps with very low 70ps jitter. The ADN4650/ADN4651/ADN4652 isolators feature the iCoupler technology for high-speed operation. This technology provides galvanic isolation of the TIA/EIA-644-A compliant LVDS drivers and receivers at full speed. The design allows for drop-in isolation of an LVDS signal chain. The LVDS and isolator circuits rely on a 2.5V supply for high-speed operation with low jitter. An integrated on-chip LDO provides the required 2.5V from an external 3.3V power supply. The devices are specified for a -40°C to +125°C industrial temperature range with 5kVrms isolation and 7.6mm creepage/clearance. To ensure safe, fast data transfer in harsh environments, the ADN4650/ADN4651/ADN4652 isolators meet 10kV peak surge protection requirements. The ADN4650/ADN4651/ADN4652 isolators are well-suited for analog front end (AFE) isolation, data-plane isolation, isolated high-speed clock and data links, and isolated SPI over LVDS.Features
- 5kVrms/3.75kVrms LVDS isolator
- Complies with TIA/EIA-644-A LVDS standard
- Multiple dual-channel configurations
- Up to 600Mbps switching with low jitter
- 2.5V or 3.3V supplies
- -75dBc power supply ripple rejection and glitch immunity
- ±8kV IEC 61000-4-2 ESD protection across an isolation barrier
- High common-mode transient immunity >25kV/μs
- Fail-safe output high for open, short, and terminated input conditions (ADN4651)
- Passes EN55022 Class B radiated emissions limits with 600Mbps PRBS or 300MHz clock
- Operating temperature range −40°C to +125°C
- Fail-safe output high for open, short, and terminated input conditions (ADN4651/ADN4652)
- Choice of package and isolation options
- 3.75kVrms in highly integrated 20-lead SSOP
- 5kVrms in 20-lead SOIC with 7.8mm creepage/clearance
Applications
- Analog front-end (AFE) isolation
- Data plane isolation
- Isolated high-speed clock and data links
- Isolated SPI over LVDS
Block Diagrams

Published: 2016-04-01
| Updated: 2022-03-11